MSc thesis project proposal
Packet Loss Concealment algorithm for real-time wireless audio systems
Project outside the university
BoschAssignment
Mid 2015 Bosch introduced DICENTIS Wireless Conference System. It is an innovative system based on standard Wi-Fi technology and smart wireless management to ensure interference-free and highly flexible wireless conferencing. A typical DICENTIS Wireless Conference System consists of a Wireless access point (WAP) and several Wireless devices (WD). Up to 4 WD�s can send their microphone signal to the WAP via the Wi-Fi connection. The WAP mixes these 4 uplink audio streams to a downlink stream. The downlink stream is broadcasted by the WAP to all WD�s. Each WD receives the downlink stream and plays the containing audio signal on its loudspeaker or headphone output. All Wi-Fi connections suffer from interference. Single Wi-Fi packets or a burst of packets are lost with some packet error rate (PER), depending on the type of interference. In a DICENTIS Wireless Conference System each packet contains 4ms of audio both for upstream and for downstream. Because of the low audio latency requirement of conference systems, there is no re-transmission mechanism and each lost Wi-Fi packet immediately results in an 4ms audio loss. Packet loss concealment (PLC) attempts to mask the effect of audio packet loss. The goal of this project is to realize a PLC algorithm optimized for the DICENTIS Wireless Conference System with following requirements: - PLC for speech signals (music would be nice to have) - PLC can handle PER up to 5% with bursts of up to 10 packets - PLC requires <1ms audio latency - PLC is robust for ambient noise - PLC can handle a mix of (up to 4) speech signals - PLC can handle limited/compressed speech signals - PLC is Suitable for fixed point FPGA implementation If you are interested please contact us to discuss further details.Requirements
We are looking for graduate students - Education: WO � level electrical engineering with affinity for digital signal processing - Knowledge of FPGAs and DSPs is considered a pro. - For 40 hours a week - Character traits: works independently, shows initiative, result focused. We offer A challenging working and learning environment. A dynamic market and with the opportunity to work with professionals in a large diversity of disciplines. The chance to gain experience in working in a multinational company. This internship has a market conform remuneration. Duration of the internship 6-9 Months Location Eindhoven Name supervisor Hans van der Schaar Contact For more information about this assignment, you can contact Hans van der Schaar Tel.nr.: 040-2577041 Email: hans.vanderschaar@nl.bosch.comContact
dr.ir. Richard Hendriks
Signal Processing Systems Group
Department of Microelectronics
Last modified: 2020-06-11